1. Field of the Invention
The present invention relates to a circuit structure for generating a constant current in a semiconductor device and in a semiconductor circuit, and more particularly, to a circuit structure generating a constant current utilized for generating a reference voltage. Further, the present invention relates to a constant current generating circuit utilized in a internal voltage-down converter which down-converts power supply voltage in a semiconductor memory device such as a DRAM (Dynamic Random Access Memory).
2. Description of the Background Art
In a semiconductor circuit and a semiconductor memory device, a circuit which generates a constant current is used in various portions. Such a constant current generating circuit is used for generating a constant reference voltage, or is employed as a current supply for a differential amplifying circuit, or is utilized as a high resistance transistor load (so called active load).
One of the circuit portions utilizing such a constant current generating circuit is an internal voltage-down converter of a DRAM. The internal voltage-down converter produces an internal power supply voltage by down-converting an externally applied power supply voltage. Such an internal voltage-down converter is utilized because of the following reasons.
Memory capacity of a DRAM has been more and more increased. Increase of the memory capacity of the DRAM can be implemented through high density and high integration of elements thanks to the miniaturization technology. MOS (insulated gate-type field effect) transistors serving as components can be reduced in size by such a miniaturization technology. Also, a thickness of the interlayer insulating film for isolating signal lines or isolating elements can be-reduced.
On the other hand, logic LSI (Large Scale Integration) such as a microprocessor which determines power supply of a system is not made so much small as DRAM, and a relatively high voltage is used as a power supply voltage.
Thus, when the external supply voltage is applied to a component of the semiconductor memory device such as a DRAM, it will be difficult to keep the reliability of a breakdown voltage of MOS transistor, a breakdown voltage of the interlayer insulating film, and the like. Therefore, the internal supply voltage is produced by down-converting the external supply voltage utilizing the internal voltage-down converter, and accordingly the reliability of the components of the semiconductor memory device such as a miniaturized DRAM can be maintained.
FIG. 10 shows an overall structure of a conventional DRAM. In FIG. 10, DRAM 100 includes an internal voltage-down converter 102 which down-converts external power supply voltage Vcc applied on an external supply line 112 via a power supply node 109 and transmits internal power supply voltage Vdd on an internal power supply line 114; an internal circuit 104 which operates using internal power supply voltage Vdd on internal supply line 114 as an operating power supply voltage, and an externally-powered circuit 106 which operates using external power supply voltage Vcc applied on external supply line 112 as an operating power supply voltage.
Also, the other power supply voltage (referred to simply as ground voltage hereinafter) Vss is applied to internal voltage-down converter 102, internal circuit 104 and externally-powered circuit 106 via the other power supply node (referred to as ground node hereinafter) 110 and the other supply line (referred to simply as ground line hereinafter) 116. Internal circuit 104 includes at least an array of memory cells, since the memory cell is most finely processed and a high voltage can not be applied to this portion in view of reliability.
Externally-powered circuit 106 includes a data input/output circuit which carries out input/output of data with the outside of the device for input/output of data at high speed and for providing an interface with an external device. Peripheral circuits such as an address decoder and a control circuit may be included in externally-powered circuit 106 or in internal circuit 104. The size of MOS transistor to which external power supply voltage Vcc is applied should be made relatively large, while MOS transistor which is driven at a relatively high voltage can operate at a high speed. Consideration of both of the above conditions determines which of internal power supply voltage Vdd and external power supply voltage Vcc should drive the peripheral circuits.
Internal voltage-down converter 102 is required to generate a stable internal power supply voltage Vdd in order to guarantee the operational stability of internal circuit 104. Various structures have been proposed for such an internal voltage-down converter.
FIG. 11 shows an example of a structure of a conventional internal voltage-down converter. In FIG. 11, internal voltage-down converter 102 includes a reference voltage generating circuit 124 which generates a predetermined reference voltage VREF; a differential amplifier 122 receiving at its negative input reference voltage VREF from reference voltage generating circuit 124 and receiving at its positive input internal power supply voltage Vdd on internal supply line 114; and a p-channel MOS transistor 120 responsive to an output of differential amplifier 122 for supplying current on internal supply line 114 from external supply line 112.
Reference voltage generating circuit 124 includes a constant current generating circuit 130 which is connected to external supply line 112 to generate a constant current, and a constant voltage diode 132 which generates a predetermined reference voltage VREF using a reference current from constant current generating circuit 130 as an operating current. Constant voltage diode 132 operates by using a constant current from constant current generating circuit 130 as a Zener current, and generates reference voltage VREF based on the Zener voltage. The operation of internal voltage-down converter 102 shown in FIG. 11 will be described below.
Differential amplifier 122 amplifies differential voltage between reference voltage VREF and internal power supply voltage Vdd. When internal power supply voltage Vdd is higher than reference voltage VREF, an output of differential amplifier 122 becomes higher than a predetermined level. Accordingly, conductance of p-channel MOS transistor 120 is made smaller (or potential difference between gate and source becomes smaller), and the amount of the current transmitted from external supply line 112 to internal supply line 114 via p-channel MOS transistor 120 is reduced. Thus, increase of internal power supply voltage Vdd is prevented.
When internal power supply voltage Vdd becomes lower than reference voltage VREF, an output of differential amplifier 122 becomes lower than a predetermined level, so that conductance of p-channel MOS transistor 120 is increased. Accordingly, the amount of current supplied from external supply line 112 to internal supply line 114 is increased, and also internal power supply voltage Vdd is increased.
Internal voltage-down converter 102 provides a function of generating internal power supply voltage Vdd which is approximately at the same level as reference voltage VREF. Internal power supply voltage Vdd is required to be kept sufficiently stable for the stable operation of the internal circuit. Constant current generating circuit 130 is required to generate a constant current stably.
FIG. 12 shows a structure of a conventional constant current generating circuit. The constant current generating circuit shown in FIG. 12 is described, for example, in VLSI Analog Integrated Circuit Design Technology, by P. R. Gray et al., translated by Yuzuru Nagata et al., published in Japan by Baifu-Kan, pp 305-307.
In FIG. 12, constant current generating circuit 130 includes a p-channel MOS transistor 154 having its source connected to external supply line 112, its gate connected to node A, and its drain connected to node B, a p-channel MOS transistor 155 having a source connected to external supply line 112, its drain connected to node A, and its gate connected to node A; a n-channel MOS transistor 151 having its drain connected to node B, its gate connected to node C and its source connected to ground line 116; a resistance 152 connected between node C and ground line 116, a n-channel MOS transistor 153 having its drain connected to node A, its gate connected to node B, and its source connected to node C; and a p-channel MOS transistor 156 having its source connected to external supply line 112, its gate connected to node A, and its drain connected to output node 157.
A current mirror circuit is structured by p-channel MOS transistors 154 and 155, and another current mirror circuit is structured by transistors 155 and 156. Transistors 154 and 155 are manufactured in nearly the same size, and supply the same current amount I0 due to the current mirror effect.
A ratio of the gate width W and the gate length L, W/L, of transistor 151 is set to a relatively large value, and also the resistance value RO of resistance 152 is set to a relatively large value. Its operation will be described below.
Since transistors 154 and 155 constitute a current mirror circuit, the same current I0 is supplied to node A and node B. Current I0 through node B passes through transistor 151, and the current node A passes through transistor 153 to resistance 152. Transistor 153 provides a function of keeping current I0 passing through resistance 152 constant. More particularly, if current I0 passing through node C, i.e., resistance 152, is increased, a potential at node C is increased, the conductance of transistor 151 is increased, and the potential at node B decreases. Accordingly, the conductance of transistor 153 is decreased, and the current passing through node C is decreased. On the contrary, when the current passing through node C is decreased, the voltage at node C is decreased, the conductance of transistor 151 is decreased, and the potential at B is increased. Accordingly, the conductance of transistor 153 is increased, and a large current is supplied to node C.
Consequently, the current passing through transistor 151 and the current passing through resistance 152 become equal.
Resistance value R0 of resistance 152 is set to a relatively large value. Thus, the current I0 becomes small. In other words, the current passing through transistor 151 is also set to a very small current value. The gate width-gate length ratio W/L of transistor 151 is set to a relatively large value. In this case, a trans-conductance value given by the following relationship becomes relatively large, where .mu.n represents the electron mobility, Cox represents the gate capacitance, and Vds represents the drain-source voltage: EQU gm=.mu.n.multidot.(W/L) Cox.multidot.Vds
In this case, transistor 151 operates in a saturation region (Vd.gtoreq.Vgs-Vthn), and the current passing through transistor 151 is given by: EQU I=(K/2) (Vgs-Vthn).sup.2
where Vgs represents the gate-source voltage, Vthn represents the threshold voltage, and K represents a constant given by gm/Vds.
Since the current I0 is set to a sufficiently small value, the gate-source voltage Vgs of transistor 151 of approximately the threshold value VTH (=Vthn) is applied according to the above expression representing the current, and the voltage applied to resistance 152 becomes equal to the threshold voltage Vthn of MOS transistor 151. Thus, the current I0 passing through resistance 152 will be: EQU I0=Vthn/R0.
according to Vthn.about.I0.multidot.R0=Vgs
Since each of the resistance value R0 and the threshold voltage Vthn is a constant, a constant current will be generated.
Meanwhile, the current mirror circuit is structured by transistors 155 and 156. A predetermined current I1 is supplied from transistor 156 according to the gate width to gate length ratio of transistors 155 and 156. In other words, a constant current expressed by the following relationship is applied: EQU I1=(W1/L1)/(W0/L0)
where W1/L1 represents the gate width to gate length ratio of transistor 156, and W0/L0 represents the gate width-gate length ratio of transistor 155.
Consequently, a constant Zener current based on the constant reference current I1 can be supplied as an operating current to constant voltage diode 132 shown in FIG. 11, and thus a predetermined reference voltage VREF can be obtained.
In the structure of constant current generating circuit 130 shown in FIG. 12, a phenomenon is observed, in which the potential at node A is increased due to the causes such as the deviation of power supply voltage Vcc, and then the transistor 154 becomes off. This is because the resistance value of resistance 152 is set to a sufficiently large value, if power supply voltage Vcc varies in a pulse manner, the potential at node A is increased. The potential of this node A is discharged through resistance 152 having a large resistance value R0, so that the potential VA at node A will not satisfy the relationship EQU Vcc-VA&gt;.vertline.Vthp.vertline.
Accordingly, transistor 154 turns into off state. This phenomenon in which the transistor 154 turns off triggers a series of operations, that is, the potential at node B is dropped (a discharge by transistor 151), transistor 153 becomes off, the potential at node C is dropped (a discharge by resistance 152), and transistor 151 turns off. As a result, the potential at node A becomes "H" (charged by diode connected transistor 155) and the potential at nodes B and C attains "L". Finally, all transistors 151-156 turn off. The circuit no longer operate as the constant current generating circuit.
By the way, in a semiconductor device such as a semiconductor memory device, a certain range (e.g., 0.degree.-70.degree. C.) is admitted for the operating temperature. In this case, characteristics of the operation of each element varies according to temperature.
FIG. 13 shows the temperature dependency of resistance (152) formed, for example, of polycrystalline silicon and the temperature dependency of the threshold voltage of MOS transistor. In FIG. 13, abscissa represents temperature T, while ordinate represents resistance value R and threshold voltage VTH. Straight line Ro shows the change of the resistance value in the resistance made, for example, of polycrystalline silicon, and straight line Vth shows the change of threshold voltage Vthn of n-channel MOS transistor. As shown in FIG. 13, resistance value Ro in resistance (152) has a positive temperature coefficient, and the resistance value increases according to the rise of the temperature. Meanwhile, threshold voltage Vthn of MOS transistor has a negative temperature coefficient decreases according to the rise of the temperature.
In the constant current generating circuit shown in FIG. 12, current I0 passing through resistance 152 is given by Vthn/R0. Thus, currents I0 and I1, which are generated by the constant current generating circuit, are decreased according to the temperature rise as shown in FIG. 14. In FIG. 14, abscissa represents temperature T and ordinate represents the amount of current I which is supplied by the constant current generating circuit. Straight lines shown in FIGS. 13 and 14 show the temperature dependency in an exaggerated manner.
Since reference currents I0 and I1 generated by the constant current generating circuit are decreased as the temperature rises, a correct reference voltage can not be generated in the reference voltage generating circuit shown in FIG. 11, so that internal power supply voltage Vdd generated from the internal voltage-down converter will change according to the temperature, and thus the internal circuit will not operate stably.
FIG. 15 shows the temperature dependency of the constant voltage diode. In FIG. 15, abscissa represents the Zener voltage and ordinate represents the temperature coefficient. Each curve represents the temperature dependency of Zener voltage Vz in each Zener current (operating current). The constant voltage diode have such characteristics that the voltage between its terminals will be constant when a certain amount of current is supplied under a reverse-biased condition. The sign of the temperature coefficient of the constant voltage diode changes with about 6 V being a border. More particularly, if Zener voltage Vz is above 6 V, the temperature coefficient is positive, while it is negative when the Zener voltage is below 6 V. This is because the Zener breakdown mechanism is dominant at lower Zener voltage, and the electron avalance mechanism is dominant at higher Zener voltage.
In the internal voltage-down converter of the semiconductor memory device, 3.3 V of the internal power supply voltage is usually generated, and the Zener voltage Vz equal to or less than this value is required. In this case, the Zener voltage applied by the constant voltage diode has a negative temperature coefficient: in other words the Zener voltage is decreased according to the rise of the temperature. By adding a forward-biased diode, it is possible to compensate for the temperature dependency: however, when the current I1, which is supplied to constant voltage diode 132 as an operating current from the constant current generating circuit, decreases according to the rise of the temperature, the temperature coefficient of Zener voltage Vz changes according to the change of the operating current. Therefore, it is not possible to compensate for the temperature dependency sufficiently even by the temperature-compensated constant voltage diode because its operating current changes, and accordingly as shown in FIG. 16, reference voltage VREF generated from the reference voltage generating circuit changes according to the rise of the temperature (FIG. 16 shows the case of the decrease of the reference voltage VREF), so that the internal power supply voltage of a constant level can not be generated stably.
In FIG. 16, abscissa represents temperature T, and ordinate represents reference voltage VREF generated from the internal reference voltage generating circuit.